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- cross-posted to:
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Designed to be simple, flexible, and non-proprietary, RISC-V is an open standard instruction set architecture (ISA) that defines the set of instructions a processor can execute.
Developed and maintained by RISC-V International, a Swiss-based non-profit, RISC-V’s open architecture allows anyone to design, implement, and fabricate custom CPUs without worries of licensing fees.
We were already seeing a steady rise in its adoption, and a recent slew of announcements has only accelerated RISC-V’s upward trend.
RISC-V Adoption is on The Rise
RISC-V International’s webpage.
In collaboration with SiFive, Red Hat is launching a developer preview of Red Hat Enterprise Linux 10 (RHEL) for the HiFive Premier P550 platform, with the aim of gathering community feedback and accelerating support for RISC-V.
To go with that, they are also working on providing a CentOS Stream 10 version that supports RISC-V, giving developers early access so that they can build, test, and contribute to the platform.
Downloads for both are expected to show up on June 1, 2025. You can read the announcement blog to learn more.
On the other hand, Rocky Linux has announced that the upcoming Rocky Linux 10 release will officially support the RISC-V architecture, thanks to the work of their AltArch SIG (special interest group).
While they are not treating the RISC-V build (riscv64gc) as a “primary architecture”, where build failures won’t halt Rocky Linux releases for other architectures, the included support for RISC-V hardware is quite reasonable.
At launch, the StarFive VisionFive 2 will be fully supported; there will be partial support for the SiFive HiFive P550 platform; no support for boards from Milk-V or Banana Pi; and full testing and evaluation support via QEMU.
Undoubtedly, things are looking up for RISC-V when it comes to Linux. I am hoping that the platform eventually matures enough to be suitable for general-purpose use, not just specialized applications.
By contrast, Windows has focused its attention on proprietary ARM-based platforms and has given no indication that it will support the RISC-V architecture any time soon.
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